The Alpha AXP, part 1: Initial plunge
Since the Itanium series was such a smash hit (two whole people read it!), here's another series for a now-defunct processor architecture which Windows once supported. The next who-knows-how-many days...
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The Alpha AXP, part 2: Integer calculations
Here are some of the integer computational operations available on the Alpha AXP. I'm going to cover only the instructions used in general-purpose programming, since that's the sort of thing you're...
View ArticleThe Alpha AXP, part 3: Integer constants
The Alpha AXP does not have a "load immediate 32-bit integer" instruction. If you need to load an immediate 32-bit integer, you need to use some tricks. We saw last time that loading 8-bit constants...
View ArticleThe Alpha AXP, part 4: Bit 15. Ugh. Bit 15.
Let's load each of the powers of two up to 2³¹, in canonical form. LDA Ra, 0x0001(zero) ; Ra = 0x00000000`00000001 ; bit 0 LDA Ra, 0x0002(zero) ; Ra = 0x00000000`00000002 ; bit 1 LDA Ra, 0x0004(zero)...
View ArticleThe Alpha AXP, part 5: Conditional operations and control flow
The Alpha AXP has no flags register. Conditional operations are performed based on the current value of a general-purpose register. The conditions available on the Alpha AXP are the following: EQ if...
View ArticleThe Alpha AXP, part 6: Memory access, basics
The Alpha AXP has only one memory addressing mode: Indexed indirect. ; load memory to register LDL Ra, disp16(Rb) ; result is sign-extended to 64 bits LDQ Ra, disp16(Rb) ; store register to memory STL...
View ArticleThe Alpha AXP, part 7: Memory access, loading unaligned data
Last time, we look ed at loading aligned memory. Now we're going to look at unaligned data. Let's load an unaligned quad. The unaligned quad will span two aligned quads, so we will need to load two...
View ArticleThe Alpha AXP, part 8: Memory access, storing bytes and words and unaligned data
Storing a byte and word requires a series of three operations: Read the original data, modify the original data to incorporate the byte or word, then write the modified data back to memory. To assist...
View ArticleThe Alpha AXP, part 9: The memory model and atomic memory operations
The Alpha AXP has a notoriously weak memory model. When a processor writes to memory, the result becomes visible to other processors eventually, but there are very few constraints beyond that. For...
View ArticleThe Alpha AXP, part 10: Atomic updates to byte and word memory units
Today we're going to do a little exercise based on what we've learned so far. We learned how to perform byte and word loads and stores to memory. And we also learned how to perform atomic memory...
View ArticleThe Alpha AXP, part 11: Processor faults
There are three types of faults on the Alpha AXP: Software faults Hardware faults Arithmetic faults Software faults are those triggered by explicit instructions, such as CALL_PAL. These are calls that...
View ArticleThe Alpha AXP: Part 12: How you detect carry on a processor with no carry?
The Alpha AXP has no corresponding trap variant for arithmetic carry. So how would you detect carry?¹ Answer: The same way you detect carry in C, or pretty much any other programming language that...
View ArticleThe Alpha AXP, part 13: On treating a 64-bit processor as if it were a 32-bit...
The Alpha AXP is natively a 64-bit processor, but Windows NT for Alpha AXP treated it as a 32-bit processor. How is that possible? The Alpha AXP registers are full 64-bit registers, and you are...
View ArticleYes, that was a horrifically awkward video, but it wasn’t the Windows 95 launch
If you search YouTube for "Windows 95 launch", you'll find many copies of this video: This is commonly identified as having been recorded at the Windows 95 launch, but it wasn't. The Windows 95 launch...
View ArticleThe Alpha AXP, part 14: On the strange behavior of writes to the zero register
I noted early on that a special rule in the Alpha AXP is that an instruction that specifies the zero register as a destination is permitted to be completely optimized out by the processor (with two...
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The Alpha AXP, part 15: Variadic functions
As noted in the initial plunge, the first six integer parameters are passed in registers, and the first six floating point parameters are passed in a different set of registers. So how does the callee...
View ArticleThe Alpha AXP, part 16: What are the dire consequences of having 32-bit...
On the Alpha AXP, 32-bit values are typically represented in so-called canonical form. But what happens if you use a non-canonical representation? Well, it depends on what instruction consumes the...
View ArticleThe Alpha AXP, part 17: Reconstructing a call stack
I'm going to wrap up the formal part of the series by applying the information we've been learning over the past several days weeks: We're going to reconstruct a broken stack. Suppose you have a debug...
View ArticleThe Alpha AXP, epilogue: A correction about file system compression on the...
Some time ago, I claimed that Windows file compression had to be dumbed down in order for the Alpha AXP to hit its performance targets. I have since been informed by somebody who worked on file system...
View ArticleI guess I may as well confess that I wrote the Itanium information in the...
A long time ago in a processor architecture far, far away, mikeb commented, "the help file for the Debugging Tools for Windows package has (or maybe "had") really, really good Itanium information in...
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